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Extended Display Identification Data

Extended Display Identification Data (EDID) and Enhanced EDID (E-EDID) are metadata formats for display devices to describe their capabilities to a video source (e.g., graphics card or set-top box). The data format is defined by a standard published by the Video Electronics Standards Association (VESA).

The EDID data structure includes manufacturer name and serial number, product type, phosphor or filter type (as chromaticity data), timings supported by the display, display size, luminance data and (for digital displays only) pixel mapping data.

DisplayID is a VESA standard targeted to replace EDID and E-EDID extensions with a uniform format suited for both PC monitor and consumer electronics devices.

Background

EDID structure (base block) versions range from v1.0 to v1.4; all these define upwards-compatible 128-byte structures. Version 2.0 defined a new 256-byte structure but it has been deprecated and replaced by E-EDID which supports multiple extension blocks.[citation needed] HDMI versions 1.0–1.3c use E-EDID v1.3.[1]

Before Display Data Channel (DDC) and EDID were defined, there was no standard way for a graphics card to know what kind of display device it was connected to. Some VGA connectors in personal computers provided a basic form of identification by connecting one, two or three pins to ground, but this coding was not standardized.

This problem is solved by EDID and DDC, as it enables the display to send information to the graphics card it is connected to. The transmission of EDID information usually uses the Display Data Channel protocol, specifically DDC2B, which is based on I²C-bus (DDC1 used a different serial format which never gained popularity). The data is transmitted via the cable connecting the display and the graphics card; VGA, DVI, DisplayPort and HDMI are supported.[citation needed]

The EDID is often stored in the monitor in the firmware chip called serial EEPROM (electrically erasable programmable read-only memory) and is accessible via the I²C-bus at address 0x50. The EDID PROM can often be read by the host PC even if the display itself is turned off.

Many software packages can read and display the EDID information, such as read-edid[2] for Linux and DOS, PowerStrip[3] for Microsoft Windows and the X.Org Server for Linux and BSD unix. Mac OS X natively reads EDID information and programs such as SwitchResX[4] or DisplayConfigX[5] can display the information as well as use it to define custom resolutions.

E-EDID was introduced at the same time as E-DDC, which supports multiple extensions blocks and deprecated EDID version 2.0 structure (it can be incorporated in E-EDID as an optional extension block). Data fields for preferred timing, range limits, and monitor name are required in E-EDID. E-EDID also adds support for the Dual GTF curve concept and partially changed the encoding of aspect ratio within the standard timings.

With the use of extensions, E-EDID structure can be extended up to 32 KiB, because the E-DDC added the capability to address multiple (up to 128) 256 byte segments.

EDID Extensions assigned by VESA

Revision history

Limitations

Some graphics card drivers have historically coped poorly with the EDID, using only its standard timing descriptors rather than its Detailed Timing Descriptors (DTDs). Even in cases where the DTDs were read, the drivers are/were still often limited by the standard timing descriptor limitation that the horizontal/vertical resolutions must be evenly divisible by 8. This means that many graphics cards cannot express the native resolutions of the most common wide screen flat panel displays and liquid crystal display televisions. The number of vertical pixels is calculated from the horizontal resolution and the selected aspect ratio. To be fully expressible, the size of wide screen display must thus be a multiple of 16×9 pixels. For 1366×768 pixel Wide XGA panels the nearest resolution expressible in the EDID standard timing descriptor syntax is 1360×765 pixels, typically leading to 3 pixel thin black bars. Specifying 1368 pixels as the screen width would yield an unnatural screen height of 769.5 pixels.

Many Wide XGA panels do not advertise their native resolution in the standard timing descriptors, instead offering only a resolution of 1280×768. Some panels advertise a resolution only slightly smaller than the native, such as 1360×765. For these panels to be able to show a pixel perfect image, the EDID data must be ignored by the display driver or the driver must correctly interpret the DTD and be able to resolve resolutions whose size is not divisible by 8. Special programs are available to override the standard timing descriptors from EDID data. Even this is not always possible, as some vendors' graphics drivers (notably those of Intel) require specific registry hacks to implement custom resolutions, which can make it very difficult to use the screen's native resolution.[7]

EDID 1.4 data format

Structure, version 1.4

Detailed Timing Descriptor

When used for another descriptor, the pixel clock and some other bytes are set to 0:

Monitor Descriptors

Currently defined descriptor types are:

Display Range Limits

Descriptor

With GTF secondary curve

With CVT support

Additional white point descriptor

Color management data descriptor

CVT 3-byte timing codes descriptor


Additional standard timings

CTA EDID Timing Extension Block

The CTA EDID Extension was first introduced in EIA/CEA-861.

CTA-861 Standard

The ANSI/CTA-861 industry standard, which according to CTA is now their "Most Popular Standard",[10] has since been updated several times, most notably with the 861-B revision (published in May 2002, which added version 3 of the extension, adding Short Video Descriptors and advanced audio capability/configuration information), 861-D (published in July 2006 and containing updates to the audio segments), 861-E in March 2008,[11] 861-F, which was published on June 4, 2013,[12] 861-H in December 2020,[13] and, most recently, 861-I, which was published in February 2023.[14] Coinciding with the publication of CEA-861-F in 2013, Brian Markwalter, senior vice president, research and standards, stated: "The new edition includes a number of noteworthy enhancements, including support for several new Ultra HD and widescreen video formats and additional colorimetry schemes.”[15]

Version CTA-861-G,[16] originally published in November 2016, was made available for free in November 2017, along with updated versions -E and -F, after some necessary changes due to a trademark complaint. All CTA standards are free to everyone since May 2018.[17][18]

The most recent full version is CTA-861-I,[19] published in February 2023, available for free after registration. It combines the previous version, CTA-861-H,[20] from January 2021 with an amendment, CTA-861.6,[21] published in February 2022 and includes a new formula to calculate Video Timing Formats, OVT.[22] Other changes include a new annex to elaborate on the audio speaker room configuration system that was introduced with the 861.2 amendment, and some general clarifications and formatting cleanup.

An amendment to CTA-861-I, CTA-861.7,[23] was published in June 2024. It contains updates to CTA 3D Audio, and clarifications on Content Type Indication, and on 4:2:0 support for VTDBs and VFDBs. It also introduces a new Product ID Data Block, to replace the Manufacturer PNP ID in the first block of the EDID, since the UEFI is phasing out assigning new PNP IDs.

CTA Extension Block

Version 1 of the extension block (as defined in CEA−861) allowed the specification of video timings only through the use of 18-byte Detailed Timing Descriptors (DTD) (as detailed in EDID 1.3 data format above). DTD timings are listed in order of preference in the CEA EDID Timing Extension.

Version 2 (as defined in 861-A) added the capability to designate a number of DTDs as "native" (i.e., matching the resolution of the display) and also included some "basic discovery" functionality for whether the display device contains support for "basic audio", YCBCR pixel formats, and underscan.

Version 3 (from the 861-B spec onward) allows two different ways to specify digital video timing formats: As in Version 1 & 2 by the use of 18-byte DTDs, or by the use of the Short Video Descriptor (SVD) (see below). HDMI 1.0–1.3c uses this[which?] version.

Version 3 also defines a format for a collection of data blocks, which in turn can contain a number of individual descriptors. This Data Block Collection (DBC) initially had four types of Data Blocks (DBs): Video Data Blocks containing the aforementioned Short Video Descriptor (SVD), Audio Data Blocks containing Short Audio Descriptors (SAD), Speaker Allocation Data Blocks containing information about the speaker configuration of the display device, and Vendor Specific Data Blocks which can contain information specific to a given vendor's use. Subsequent versions of CTA-861 defined additional data blocks.

CTA Extension data format

The Data Block Collection contains one or more data blocks detailing video, audio, and speaker placement information about the display. The blocks can be placed in any order, and the initial byte of each block defines both its type and its length:

If the Tag code is 7, an Extended Tag Code is present in the first payload byte of the data block, and the second payload byte represents the first payload byte of the extended data block.

Once one data block has ended, the next byte is assumed to be the beginning of the next data block. This is the case until the byte (designated in byte 2, above) where the DTDs are known to begin.

CTA Data Blocks

As noted, several data blocks are defined by the extension.

Video Data Blocks

The Video Data Blocks will contain one or more 1-byte Short Video Descriptors (SVDs).

EIA/CEA-861 predefined standard resolutions and timings

Notes: Parentheses indicate instances where pixels are repeated to meet the minimum speed requirements of the interface. For example, in the 720x240p case, the pixels on each line are double-clocked. In the (2880)x480i case, the number of pixels on each line, and thus the number of times that they are repeated, is variable, and is sent to the DTV monitor by the source device.

Increased Hactive expressions include “2x” and “4x” indicate two and four times the reference resolution, respectively.

Video modes with vertical refresh frequency being a multiple of 6 Hz (i.e. 24, 30, 60, 120, and 240 Hz) are considered to be the same timing as equivalent NTSC modes where vertical refresh is adjusted by a factor of 1000/1001. As VESA DMT specifies 0.5% pixel clock tolerance, which 5 times more than the required change, pixel clocks can be adjusted to maintain NTSC compatibility; typically, 240p, 480p, and 480i modes are adjusted, while 576p, 576i and HDTV formats are not.

Audio Data Blocks

The Audio Data Blocks contain one or more 3-byte Short Audio Descriptors (SADs). Each SAD details audio format, channel number, and bitrate/resolution capabilities of the display as follows:

Vendor Specific Data Block

A Vendor Specific Data Block (if any) contains as its first three bytes the vendor's IEEE 24-bit registration number,[24] least significant byte first. The remainder of the Vendor Specific Data Block is the "data payload", which can be anything the vendor considers worthy of inclusion in this EDID extension block. For example, IEEE registration number 00 0C 03 means this is a "HDMI Licensing, LLC" specific data block (contains HDMI 1.4 info), C4 5D D8 means this is a "HDMI Forum" specific data block (contains HDMI 2.0 info), 00 D0 46 means this is "DOLBY LABORATORIES, INC." (contains Dolby Vision info) and 90 84 8b is "HDR10+ Technologies, LLC" (contains HDR10+ info as part of HDMI 2.1 Amendment A1 standard[25]). It starts with a two byte source physical address, least significant byte first. The source physical address provides the CEC physical address for upstream CEC devices. HDMI 1.3a specifies some requirements for the data payload.

Speaker Allocation Data Block

If a Speaker Allocation Data Block is present, it will consist of three bytes. The first and second bytes contain information about which speakers (or speaker pairs) are present in the display device:

Some speaker flags have been deprecated in the SADB, but are still available in the RCDB's SPM. These speakers could not be indicated with a CA value in the Audio InfoFrame, and can only be used with Delivery According to the Speaker Mask, which corresponds to the RCDB only.

Room Configuration Data Block

The Room Configuration Data Block and Speaker Location Data Blocks describe the speaker setup using room coordinates.

References

  1. ^ "High-Definition Multimedia Interface Specification Version 1.3a" (PDF). 10 November 2006. Archived from the original (PDF) on 5 March 2016. Retrieved 2017-04-01.
  2. ^ "read-edid". Polypux.org. Archived from the original on 2010-12-11. Retrieved 2017-04-01.
  3. ^ "Utilities | PowerStrip". EnTech Taiwan. 2012-03-25. Archived from the original on 2011-03-08. Retrieved 2017-04-01.
  4. ^ "SwitchResX - The Most Versatile Tool For Controlling Screen Resolutions On Your Mac". Madrau.com. Archived from the original on 2009-02-08. Retrieved 2017-04-01.
  5. ^ Harald Schweder (2003-02-11). "DisplayConfigX". 3dexpress.de. Archived from the original on 2011-07-18. Retrieved 2017-04-01.
  6. ^ "VESA Display Device Data Block (DDDB) Standard" (PDF). github.io. 25 September 2006. Archived (PDF) from the original on 2021-04-17.
  7. ^ Brezenski (2009-08-07). "Custom Resolutions on Intel Graphics". Software.intel.com. Archived from the original on 2011-03-15. Retrieved 2009-11-04.
  8. ^ a b c d e f g h i j VESA E-EDID Standard, Release A, Revision 2. September 25, 2006 Archived November 11, 2020, at the Wayback Machine;
  9. ^ VESA Enhanced EDID Standard (PDF), Video Electronics Standards Association, 2000-02-09, p. 32, archived (PDF) from the original on 2012-04-25, retrieved 2011-11-19
  10. ^ "CTA-861 – CTA's Most Popular Standard". Consumer Technology Association®. CTA. Archived from the original on 11 October 2022.
  11. ^ "A DTV Profile for Uncompressed High Speed Digital Interfaces (CTA-861-E)". Consumer Technology Association®. CTA. Retrieved 4 August 2023.
  12. ^ "A DTV Profile for Uncompressed High Speed Digital Interfaces (CTA-861-F)". Consumer Technology Association®. CTA. Retrieved 4 August 2023.
  13. ^ "A DTV Profile for Uncompressed High Speed Digital Interfaces (ANSI/CTA-861-H)". Consumer Technology Association®. CTA. Retrieved 4 August 2023.
  14. ^ "A DTV Profile for Uncompressed High Speed Digital Interfaces (ANSI/CTA-861-I)". Consumer Technology Association®. CTA. Retrieved 4 August 2023.
  15. ^ Paul Ploumis (2013-07-16). "CEA publishes new high-speed CEA-861-F DTV Interface Standard". Scrapmonster.com. Archived from the original on 2017-04-15. Retrieved 2017-04-01.
  16. ^ "A DTV Profile for Uncompressed High Speed Digital Interfaces" (PDF). 29 November 2017. CTA-861-G. Archived from the original (PDF) on 2017-11-30. Retrieved 2017-11-30.
  17. ^ "CTA's Entire Library of Industry Standards Now Free to Everyone". www.cta.tech. Archived from the original on 29 July 2019. Retrieved 2 April 2020.
  18. ^ "News - "Confidential" HDMI Specifications Docs Hit With DMCA Takedown". TV ADDONS. Archived from the original on 18 September 2020. Retrieved 2 April 2020.
  19. ^ "A DTV Profile for Uncompressed High Speed Digital Interfaces (ANSI/CTA-861-I)". Consumer Technology Association®. Archived from the original on 29 March 2023. Retrieved 29 March 2023.
  20. ^ "A DTV Profile for Uncompressed High Speed Digital Interfaces (ANSI/CTA-861-H)". 27 May 2021. CTA-861-H. Archived from the original on 2021-06-21. Retrieved 2021-05-27.
  21. ^ "Improvements on Audio and Video Signaling (CTA-861.6)". 2022-03-14. CTA-861.6. Archived from the original on 2022-05-17. Retrieved 2022-06-24.
  22. ^ "OVT - Optimized Video Timing Generator - CTA". www.cta.tech. CTA. Retrieved 4 August 2023.
  23. ^ "Improvements to CTA-861-I (CTA-861.7)". Consumer Technology Association®. Retrieved 27 June 2024.{{cite web}}: CS1 maint: url-status (link)
  24. ^ "Welcome to The Public Listing For IEEE Standards Registration Authority". regauth.standards.ieee.org. Archived from the original on 13 May 2020. Retrieved 1 April 2020.
  25. ^ "edid-decode.git - edid-decode main repository". git.linuxtv.org. Archived from the original on 1 August 2020. Retrieved 2 April 2020.
  26. ^ see section 8.7 of HDMI 1.3a

External links